A bias circuit employing a multi-output operational amplifier is used for a system or a semiconductor integrated circuit in which a plurality of analog signals from an analog signal processing circuit such as a high frequency signal processing circuit or the like are input to an analog signal processing circuit such as an A/D converter or the like via respective capacitors.
In many cases, signal grounds of a plurality of analog signals output from an analog signal processing circuit such as a high frequency signal circuit or the like are different from one another in such a system or semiconductor integrated circuit. Therefore, the system or circuit is configured so that one or more capacitors are inserted between two analog signal processing circuits which send and receive a plurality of analog signals to electrically block signal grounds of the plurality of analog signals, and the signal grounds are supplied as a common voltage by a bias circuit employing a multi-output operational amplifier.
Currently, the scale and operation speed of systems demanded in semiconductor integrated circuits are increased more and more and the power consumption and circuit area thereof are reduced more and more. Therefore, the number of cases in which a plurality of analog signals have to be transmitted between two capacitively coupled analog signal processing circuits has been significantly increased. Situations arise more frequently where a bias circuit employing a multi-output operational amplifier is used.
Hereinafter, known configurations for a bias circuit employing a multi-operational amplifier will be descried.
A first prior art will be descried with reference to FIG. 9. When N analog signals are input to an analog signal processing circuit ANA2 from an analog signal output circuit ANA1 via respective capacitors C, there can be a configuration in which N operational amplifiers OpAS1, OpAS2, . . . OpASn respectively corresponding to N terminals to which a bias voltage has to be supplied are provided so that each of the amplifiers makes up a voltage follower, a desired bias voltage VIr such as a signal ground (hereinafter referred to as “SG”) or the like is supplied to the input terminals VIP1, VIP2, . . . VIPn of the voltage followers, and the bias voltage VIr is supplied to each of the input terminals IN1, IN2, . . . INn of the analog signal processing circuit ANA2 from respective output terminals VOp1, VOp2, . . . VOpn via respective resistors R.
Next, a second prior art will be described with reference to FIG. 10. In FIG. 10, one operational amplifier OpAS is provided to make up a voltage follower, a desired bias voltage VIr is input to an input terminal VIP of the voltage follower, an output terminal VOp of the operational amplifier OpAS is connected to a plurality of output terminals VO1 through VOn of a bias circuit Bias via a plurality of respective resistors R, and the bias voltage VIr such as SG is supplied to each of input terminals IN1 through INn.
Then, a third prior art will be described with reference to FIG. 11. This prior art is described in Patent Document 1. In FIG. 11, a differential amplifier circuit OpAS and a plurality of output amplifier circuits OA1, OA2, . . . OAn are configured to serve as a system AmpM and a signal, i.e., a bias voltage, received by this system is supplied to each of input terminals IN1 through INn of the analog signal processing circuit ANA2. In this system configuration, the bias voltage VIr is supplied to a non-inverting input terminal VIP of the differential amplifier circuit OpAS, an output terminal VOp of the differential amplifier circuit OpAS is connected to a plurality of input terminals of the plurality of output amplifier circuits OA1 through OAn, each of respective output terminals VOp1, VOp2, . . . VOpn of the plurality of the output amplifier circuits OA1 through OAn is connected to the non-inverting amplifier terminal VIM of the differential amplifier circuit OpAS via an associated one of feedback resistors Rf, and the non-inverting input terminal VIM of the differential amplifier circuit OpAS is connected to a base voltage (ground voltage) via a reference resistor Rs. Thus, this system is configured to serves as a circuit which is as a non-inverting amplifier circuit having a common input terminal and a plurality of outputs and the gain of which is determined by the ratio between the feedback resistor Rf and the reference resistor Rs.
Patent Reference 1: Japanese Laid-Open Publication No. H07-202589